Schedule
Mon-Wed-Fri, 10:45 AM - 11:45 AM (8/24/2020 - 11/24/2020) Location: MAIN (VRTL SYNC - Classroom Lecture)
Fri, 3:30 PM - 6:30 PM (8/24/2020 - 11/24/2020) Location: MAIN (VRTL SYNC - LAB)
Description
Introduction to Field-Programmable Gate Arrays (FPGAs)-integrated circuit structure, concepts, programming, and user designs by way of lecture and laboratory. Thorough treatment of the Verilog Hardware Description Language (HDL) and Xilinx design software plus development boards, in a lab-based approach, via simulation and actual implementation plus testing. System level design begins with lower level blocks, such as multiplexors, decoders, counters, state-machines, UARTS and then proceeds to an embedded microcontroller. (3 units; As offered)