Schedule
Mon-Wed-Fri, 8:15 AM - 9:15 AM (8/24/2020 - 11/24/2020) Location: MAIN (VRTL SYNC - Classroom Lecture)
Fri, 10:30 AM - 12:30 PM (8/24/2020 - 11/24/2020) Location: MAIN (VRTL SYNC - LAB)
Description
Boolean algebra, number systems and representations, analysis and design of combinational and sequential logic circuits, minimization, small and medium scale integrated devices, programmable logic and simulation of digital circuits. Prerequisite: MAT 115 or above. (4 units; Fall)